DocumentCode
1768698
Title
Design considerations of synaptic device for neuromorphic computing
Author
Shimeng Yu ; Kuzum, Duygu ; Wong, H.-S Philip
Author_Institution
Sch. of Comput., Inf., & Decision Syst. Eng., Arizona State Univ., Tempe, AZ, USA
fYear
2014
fDate
1-5 June 2014
Firstpage
1062
Lastpage
1065
Abstract
Hardware implementation of neuromorphic computing is attractive as a computing paradigm beyond the conventional digital Boolean computing. Recently, two-terminal emerging memory devices that show electrically-triggered resistance modulation have been proposed as synaptic devices for neuromorphic computing. The synaptic device candidates include phase change memory (PCM), resistive RAM (RRAM) and conductive bridge RAM (CBRAM), etc. In this paper, we discuss the general design considerations of synaptic devices for plasticity and learning. As a rule of thumb for performance metrics assessment, an ideal synaptic device should have characteristics such as dimension, energy consumption, operation frequency, dynamic range, etc. that are scalable to biological systems with comparable complexity.
Keywords
learning (artificial intelligence); neural nets; phase change memories; CBRAM; PCM; RRAM; biological systems; conductive bridge RAM; electrically-triggered resistance modulation; hardware implementation; learning; neuromorphic computing; performance metrics assessment; phase change memory; plasticity; resistive RAM; synaptic device design; two-terminal emerging memory devices; Energy consumption; Immune system; Neuromorphics; Neurons; Phase change materials; Programming; CBRAM; PCM; RRAM; learning; neuromorphic computing; plasticity; synaptice device;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems (ISCAS), 2014 IEEE International Symposium on
Conference_Location
Melbourne VIC
Print_ISBN
978-1-4799-3431-7
Type
conf
DOI
10.1109/ISCAS.2014.6865322
Filename
6865322
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