DocumentCode :
1772585
Title :
Pipelined modular multiplier supporting multiple standard prime fields
Author :
Alrimeih, Hamad ; Rakhmatov, Daler
Author_Institution :
Cyber Security Centre, KACST, Riyadh, Saudi Arabia
fYear :
2014
fDate :
18-20 June 2014
Firstpage :
48
Lastpage :
56
Abstract :
Computationally-intensive cryptographic applications are critically dependent on the efficiency of modular multiplications. It is desirable for a modular multiplier to offer not only high performance, but also a certain degree of flexibility, supporting multiplications over finite fields of varying size. We propose a fast and flexible modular multiplier over five prime fields GF(p), standardized by NIST for use in elliptic curve cryptography, where the five special primes p are of size 192, 224, 256, 384, and 521 bits. A prime-specific datapath configuration of our multiplier is established automatically, based on an external control word that identifies a NIST prime in use. The pipeline latency of our multiplier (implemented on a Virtex-6 FPGA and running at 100 MHz) is 80 ns for 192-bit, 224-bit, and 256-bit NIST primes, and 200 ns for 384-bit and 521-bit NIST primes. The main limitation of this work is that our multiplier currently supports only the NIST prime fields. We believe that such a limitation is justifiable, as the NIST prime fields are widely used in practice and enable performance improvements through specialized hardware optimizations.
Keywords :
field programmable gate arrays; matrix multiplication; public key cryptography; NIST primes; Virtex-6 FPGA; computationally-intensive cryptographic applications; elliptic curve cryptography; external control word; field programmable gate array; flexibility degree; hardware optimizations; modular multiplications; multiple standard prime fields; pipelined modular multiplier; prime-specific datapath configuration; Clocks; Field programmable gate arrays; Hardware; NIST; Pipelines; Throughput; Zirconium;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Application-specific Systems, Architectures and Processors (ASAP), 2014 IEEE 25th International Conference on
Conference_Location :
Zurich
Type :
conf
DOI :
10.1109/ASAP.2014.6868630
Filename :
6868630
Link To Document :
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