Invited Keynote Address: Multi-Core Processors in Critical Applications

Multi-core processors (MCPs) are now proposed for use in critical applications for their increased performance and to mitigate product obsolescence. MCPs offer adaptive systems powerful features to dynamically change behavior at run-time in response to changes in the operational environment, system configuration, resource availability or other factors, but are still looked at warily in critical domains. Fault-tolerant architectures targeted at high-reliability can be, in principle, implemented in multi-core devices making full use of redundant hardware and software. In that case, the fault tolerance or at least fail safe mechanism must be provided by an external fault detection function. However MCPs contain built-in components that are not present in single-core processors which can provoke nondeterministic interference between the software applications executing on the separate cores. In addition, some MCPs can dynamically change the behaviour of the processors in the absence of external input upon fulfilment of certain criteria. This presentation will discuss the reasons why we are compelled to use multi-core processors, the issues these devices pose in critical applications and possible solutions to them.