A novel double gate tunnel field effect transistor with 9 mV/dec average subthreshold slope

In this paper, a novel double gate tunnel field effect transistor (DGTFET) configuration with p⁺-layer in the channel is proposed and investigated. The proposed structure is a Si-channel DGTFET, which has a p⁺-layer in the channel connected to the P⁺ source region in order to achieve improved switching and higher ON-current when compared to a conventional TFET. The simulation results of DGTFET with p⁺-layer in the channel shows excellent characteristics with high I_ON/I_OFF ratio (about 5×10¹²) and an average subthreshold slope of about 9 mV/decade over 4 decades of current at room temperature. Results suggest that, the DGTFET with p⁺-layer in the channel seem to be the most optimal ones to replace MOSFET for ultralow power applications and switching devices.