A channel coder design for a novel high speed communication system

Author

George, Nivia ; Neshma, A.N. ; Nanditha, K. ; Francis, Jobin ; Joseph, Jayaraj ; Sarika, K.T. ; Raju, Abin Johns

Author_Institution

Dept. of Electron. & Commun. Eng., Jyothi Eng. Coll., Thrissur, India

fYear

2014

fDate

10-11 Oct. 2014

Firstpage

1

Lastpage

5

Abstract

A technique used for controlling the errors in data transmission over a noisy channel is known as Channel coding. Low Density Parity Check(LDPC) codes and also Turbo codes approaches Shannon capacity limit. In this paper, the performance of Quasi Cyclic(QC) LDPC codes and Random LDPC codes are compared in terms of error. The code which is appropriate for hardware implementation in terms of structural complexity is identified here. The BER performances of QC-LDPC and Turbo codes are analysed. The channel coder which is more suitable for a high speed communication system is identified in this paper.

Keywords

channel coding; cyclic codes; error statistics; parity check codes; turbo codes; BER performances; LDPC codes; Turbo codes; channel coder design; high speed communication system; low density parity check; noisy channel; structural complexity; Bit error rate; Communication systems; Complexity theory; Decoding; Parity check codes; Sparse matrices; Turbo codes; Min Sum Algorithm; QC-LDPC codes; Random LDPC codes; Turbo codes;

fLanguage

English

Publisher

ieee

Conference_Titel

Advances in Electronics, Computers and Communications (ICAECC), 2014 International Conference on

Conference_Location

Bangalore

Type

conf

DOI

10.1109/ICAECC.2014.7002412

Filename

7002412