• DocumentCode
    178955
  • Title

    Error-adaptive classifier boosting (EACB): Exploiting data-driven training for highly fault-tolerant hardware

  • Author

    Zhuo Wang ; Schapire, Robert ; Verma, Naveen

  • Author_Institution
    Dept. of Electr. Eng., Princeton Univ., Princeton, NJ, USA
  • fYear
    2014
  • fDate
    4-9 May 2014
  • Firstpage
    3884
  • Lastpage
    3888
  • Abstract
    Technological scaling and system-complexity scaling have dramatically increased the prevalence of hardware faults, to the point where traditional approaches based on design margining are becoming un-viable. The challenges are exacerbated in embedded sensing applications due to constraints on system resources (energy, area). Given the importance of classification functions in such applications, this paper presents an architecture for overcoming faults within a classification processor. The approach employs machine learning for modeling not only complex sensor signals but also error manifestations due to hardware faults. Adaptive boosting is exploited in the architecture for performing iterative data-driven training. This enables the effects of faults in preceding iterations to be modeled and overcome during subsequent iterations. We demonstrate a system integrating the proposed classifier, capable of training its model entirely within the architecture by generating estimated training labels. FPGA experiments show that high fault rates (affecting >3% of all circuit nodes) occurring on >80% of the hardware can be overcome, restoring system performance to fault-free levels.
  • Keywords
    fault tolerant computing; field programmable gate arrays; iterative methods; learning (artificial intelligence); pattern classification; sensors; EACB; FPGA; classification processor; complex sensor signals; embedded sensing applications; error-adaptive classifier boosting; hardware faults; highly fault-tolerant hardware; iterative data-driven training; machine learning; system-complexity scaling; technological scaling; Brain modeling; Circuit faults; Computer architecture; Field programmable gate arrays; Hardware; Logic gates; Training; Boosting; Circuit faults; Fault tolerance; Machine learning; Sensor systems;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Acoustics, Speech and Signal Processing (ICASSP), 2014 IEEE International Conference on
  • Conference_Location
    Florence
  • Type

    conf

  • DOI
    10.1109/ICASSP.2014.6854329
  • Filename
    6854329