Radiation hardened ULSI technology and design of 1M SRAM

A radiation hardened 0.5 μm Ultra Large Scale Integration (ULSI) technology was successfully developed to support the full scale production of a 1 Megabit Static Random Access Memory (1M SRAM). This ULSI technology represents the latest in a family of epitaxial bulk silicon CMOS used to produce 64 K SRAM, 256 K SRAM, an enhanced 256 K SRAM, and finally the 1M SRAM. A fast, electrically configurable ×8,×4,×1 radiation hardened 1M SRAM has been designed to operate at 3.3 V and is CMOS/TTL compatible. A small cell size of 89 μm² was achieved while maintaining a single event upset immunity and a write pulse time of less than 20 ns.