Hardware Design of a High Performance Multi-Channel High Speed Signal Acquisition and Processing System

Author

Qiang, Wu ; Yangong, Bai

Author_Institution

Beijing Univ. of Technol., Beijing

fYear

2007

fDate

Aug. 16 2007-July 18 2007

Abstract

This paper describes the hardware design of a high speed acquisition system based on a single DSP of ADI Blackfin family. In order to realize multi-functions in a single board, CPLD and FPGA chips are integrated in this system. This study discusses several main problems during hardware design of this system, such as sampling of multi-channel analog signals, multi-channel digital signals and communication with host board by extended PCI bus, in addition talking about several points concerned with signal integrity issues. The main aim of this research is to demonstrate that as development of DSP and semiconductor techniques, a more complex electric system can be realized on a single DSP.

Keywords

computerised instrumentation; data acquisition; digital signal processing chips; field programmable gate arrays; programmable logic devices; signal processing equipment; signal sampling; ADI Blackfin family; CPLD; DSP; FPGA chips; complex programmable logic device; extended PCI bus; hardware design; host board; multichannel analog signal sampling; multichannel digital signals; multichannel high speed signal acquisition; signal processing system; Clocks; Digital signal processing; Digital signal processing chips; Field programmable gate arrays; Hardware; Instruments; Monitoring; Signal design; Signal processing; Velocity measurement; DSP; PC104-Plus; Signal acquisition;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronic Measurement and Instruments, 2007. ICEMI '07. 8th International Conference on

Conference_Location

Xi´an

Print_ISBN

978-1-4244-1136-8

Electronic_ISBN

978-1-4244-1136-8

Type

conf

DOI

10.1109/ICEMI.2007.4351257

Filename

4351257