DocumentCode
1802161
Title
Dynamic threshold schemes for multi-level non-volatile memories
Author
Sala, Frederic ; Gabrys, Ryan ; Dolecek, Lara
Author_Institution
EE Dept., UCLA, Los Angeles, CA, USA
fYear
2012
fDate
4-7 Nov. 2012
Firstpage
1245
Lastpage
1249
Abstract
In non-volatile memories, reading stored data is typically done through the use of predetermined fixed thresholds. However, due to problems commonly affecting such memories, including voltage drift, overwriting, and inter-cell coupling, fixed threshold usage often results in significant asymmetric errors. To combat these problems, the notion of dynamic thresholds was introduced and applied to the reading of binary sequences. In this paper, we explore the use of dynamic thresholds for multi-level cell (MLC) memories. We provide a general scheme to compute and apply dynamic thresholds and derive performance bounds. We show that the proposed scheme compares favorably with the best-possible thresholding scheme. Finally, we develop asymmetric limited magnitude error-correction codes tailored to take advantage of dynamic thresholds.
Keywords
error correction; error correction codes; random-access storage; MLC memories; asymmetric errors; asymmetric limited magnitude error-correction codes; binary sequence reading; dynamic threshold schemes; intercell coupling; multilevel nonvolatile memories; overwriting; performance bounds; stored data reading; voltage drift;
fLanguage
English
Publisher
ieee
Conference_Titel
Signals, Systems and Computers (ASILOMAR), 2012 Conference Record of the Forty Sixth Asilomar Conference on
Conference_Location
Pacific Grove, CA
ISSN
1058-6393
Print_ISBN
978-1-4673-5050-1
Type
conf
DOI
10.1109/ACSSC.2012.6489222
Filename
6489222
Link To Document