DocumentCode :
1804870
Title :
XDL-Based Module Generators for Rapid FPGA Design Implementation
Author :
Ghosh, Subhrashankha ; Nelson, Brent
Author_Institution :
Dept. of Electr. & Comput. Eng., Brigham Young Univ., Provo, UT, USA
fYear :
2011
fDate :
5-7 Sept. 2011
Firstpage :
64
Lastpage :
69
Abstract :
XDLCoreGen is described, a module generator framework which directly generates placed and routed hard macros in XDL. XDLCoreGen is intended to be used in a rapid prototyping flow such as HM Flow, which achieves short FPGA implementation times by bypassing the conventional Xilinx tool flow and directly assembling designs from pre-built hard macros. The structure of XDLCoreGen is described and its unique cache-based router is highlighted as a key component to achieving extremely fast module generation times. Testing results are provided to demonstrate XDLCoreGen´s ability to generate fully placed and routed hard macros in milliseconds.
Keywords :
field programmable gate arrays; high level synthesis; CAD tool contexts; HMFlow; XDLCoreGen-based module generators; conventional Xilinx tool flow; high-level synthesis tools; prebuilt route hard macros; rapid FPGA design implementation; rapid prototyping flow; Adders; Field programmable gate arrays; Generators; Logic gates; Switches; Tiles; Wires; CAD; FPGA; rapid prototyping;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Field Programmable Logic and Applications (FPL), 2011 International Conference on
Conference_Location :
Chania
Print_ISBN :
978-1-4577-1484-9
Electronic_ISBN :
978-0-7695-4529-5
Type :
conf
DOI :
10.1109/FPL.2011.22
Filename :
6044786
Link To Document :
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