DocumentCode
180750
Title
Building trusted ICs using split fabrication
Author
Vaidyanathan, Karthikeyan ; Das, Bishnu Prasad ; Sumbul, Ekin ; Renzhi Liu ; Pileggi, Larry
Author_Institution
Carnegie Mellon Univ., Pittsburgh, PA, USA
fYear
2014
fDate
6-7 May 2014
Firstpage
1
Lastpage
6
Abstract
Due to escalating manufacturing costs the latest and most advanced semiconductor technologies are often available at off-shore foundries. Utilizing these facilities significantly limits the trustworthiness of the corresponding integrated circuits for mission critical applications. We address this challenge of cost-effective and trustworthy CMOS manufacturing for advanced technologies using split fabrication. Split fabrication, the process of splitting an IC into an untrusted and trusted component, enables the designer to exploit the most advanced semiconductor manufacturing capabilities available offshore without disclosing critical IP or system design intent. We show that split fabrication after the Metal1 layer is secure and has negligible performance and area overhead compared to complete IC manufacturing in the off-shore foundry. Measurements from split fabricated 130nm testchips demonstrate the feasibility and efficacy of the proposed approach.
Keywords
CMOS integrated circuits; design for testability; foundries; integrated circuit manufacture; Metal1 layer; area overhead; integrated circuit manufacturing; mission critical integrated circuits; offshore foundries; size 130 nm; split fabrication; test chips; trustworthy CMOS manufacturing; Decision support systems; Hardware design languages; IP networks; Random access memory; Security; System-on-chip; Circuit obfuscation; Design for trust; Hardware security; Split fabrication;
fLanguage
English
Publisher
ieee
Conference_Titel
Hardware-Oriented Security and Trust (HOST), 2014 IEEE International Symposium on
Conference_Location
Arlington, VA
Print_ISBN
978-1-4799-4114-8
Type
conf
DOI
10.1109/HST.2014.6855559
Filename
6855559
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