• DocumentCode
    180795
  • Title

    Experimental evaluation of two software countermeasures against fault attacks

  • Author

    Moro, N. ; Heydemann, Karine ; Dehbaoui, Amine ; Robisson, B. ; Encrenaz, Emmanuelle

  • Author_Institution
    Commissariat a l´Energie Atomique et aux Energies Alternatives, Gardanne, France
  • fYear
    2014
  • fDate
    6-7 May 2014
  • Firstpage
    112
  • Lastpage
    117
  • Abstract
    Injection of transient faults can be used as a way to attack embedded systems. On embedded processors such as microcontrollers, several studies showed that such a transient fault injection with glitches or electromagnetic pulses could corrupt either the data loads from the memory or the assembly instructions executed by the circuit. Some countermeasure schemes which rely on temporal redundancy have been proposed to handle this issue. Among them, several schemes add this redundancy at assembly instruction level. In this paper, we perform a practical evaluation for two of those countermeasure schemes by using a pulsed electromagnetic fault injection process on a 32-bit microcontroller. We provide some necessary conditions for an efficient implementation of those countermeasure schemes in practice. We also evaluate their efficiency and highlight their limitations. To the best of our knowledge, no experimental evaluation of the security of such instruction-level countermeasure schemes has been published yet.
  • Keywords
    electromagnetic pulse; embedded systems; instruction sets; microcontrollers; program assemblers; security of data; software reliability; assembly instruction level; attack embedded systems; data loads; embedded processors; fault attacks; instruction-level countermeasure schemes; microcontrollers; necessary conditions; pulsed electromagnetic fault injection process; software countermeasure scheme; temporal redundancy; transient fault injection; Assembly; Circuit faults; Electromagnetics; Encoding; Fault tolerance; Fault tolerant systems; Registers; assembly; countermeasure; fault injection; instruction skip; microcontroller;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Hardware-Oriented Security and Trust (HOST), 2014 IEEE International Symposium on
  • Conference_Location
    Arlington, VA
  • Print_ISBN
    978-1-4799-4114-8
  • Type

    conf

  • DOI
    10.1109/HST.2014.6855580
  • Filename
    6855580