• DocumentCode
    1807965
  • Title

    A level shifter with logic error correction circuit for extremely low-voltage digital CMOS LSIs

  • Author

    Osaki, Yuji ; Hirose, Tetsuya ; Kuroki, Nobutaka ; Numa, Masahiro

  • Author_Institution
    Dept. of Electr. & Electron. Eng., Kobe Univ., Kobe, Japan
  • fYear
    2011
  • fDate
    12-16 Sept. 2011
  • Firstpage
    199
  • Lastpage
    202
  • Abstract
    A level shifter circuit capable of extremely low-voltage inputs is presented in this paper. The circuit has a distinctive feature in current generation scheme with logic error correction circuit by detecting input and output logic levels. The proposed circuit can convert low-voltage input digital signals into high-voltage output digital signals. The circuit achieves low-power operation because it dissipates operating current only when the input signals change. Measurement results demonstrated that the circuit can convert low-voltage input signals of 0.4 V into 3 V output signals. The power dissipation was 58 nW at 0.4-V and 10-kHz input pulse.
  • Keywords
    CMOS digital integrated circuits; error correction; large scale integration; logic circuits; shift registers; frequency 10 kHz; level shifter; logic error correction circuit; logic levels; low-voltage digital CMOS LSI; power 58 nW; voltage 0.4 V; voltage 3 V; Current measurement; Error correction; Frequency measurement; MOSFETs; Power dissipation; Threshold voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    ESSCIRC (ESSCIRC), 2011 Proceedings of the
  • Conference_Location
    Helsinki
  • ISSN
    1930-8833
  • Print_ISBN
    978-1-4577-0703-2
  • Electronic_ISBN
    1930-8833
  • Type

    conf

  • DOI
    10.1109/ESSCIRC.2011.6044899
  • Filename
    6044899