DocumentCode
1809303
Title
A simple simulation method for analyzing substrate coupling
Author
Kimura, Tomohisa
Author_Institution
Corporate Res. & Dev. Center, Toshiba Corp., Japan
Volume
4
fYear
2002
fDate
2002
Abstract
A simple simulation method for analyzing substrate coupling effects is proposed. In this method, a substrate network model is extracted from the layout data, and analyses are carried out by using a circuit simulator under a conventional CAD environment. Test chips were fabricated in order to demonstrate the effectiveness of this proposed method. Simulation results were compared with the measured results. These comparisons showed the validity of the proposed simulation method.
Keywords
CMOS integrated circuits; circuit layout CAD; circuit simulation; crosstalk; electromagnetic coupling; integrated circuit layout; mixed analogue-digital integrated circuits; substrates; CAD environment; circuit simulator; guard rings; layout data; parasitic elements; simulation method; substrate coupling effects; substrate network model; system-on-a-chip; test chips; triple-well CMOS process; Analog circuits; Analytical models; Circuit simulation; Circuit testing; Coupling circuits; Data analysis; Data mining; Dielectric substrates; Digital circuits; Semiconductor device measurement;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on
Print_ISBN
0-7803-7448-7
Type
conf
DOI
10.1109/ISCAS.2002.1010587
Filename
1010587
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