New Method for Oxide Capacitance Extraction

Author

Raya, C. ; Schwartzmann, T. ; Chevalier, P. ; Pourchon, F. ; Celi, D. ; Zimmer, T.

Author_Institution

FTM, Crolles

fYear

2007

fDate

Sept. 30 2007-Oct. 2 2007

Firstpage

188

Lastpage

191

Abstract

Based on different geometries of bipolar transistors, a new scalable method to determine the parasitic capacitances is presented. The total capacitance measured from cold S parameters could be split in an area junction capacitance, a peripheral junction capacitance and a constant oxide contribution. This method is applied to a ST state-of-art fully self aligned double poly BiCMOS technology, and results are discussed.

Keywords

BiCMOS integrated circuits; S-parameters; bipolar transistors; capacitance measurement; ST state-of-art fully self aligned technology; bipolar transistors; cold S parameters; double poly BiCMOS technology; oxide capacitance extraction; parasitic capacitance measurement; Area measurement; Bipolar transistors; Capacitance measurement; Electrical resistance measurement; Frequency measurement; Geometry; Integrated circuit modeling; Microelectronics; Parasitic capacitance; Scattering parameters; Bipolar modeling; HICUM; area capacitance; oxide capacitance; peripheral capacitance;

fLanguage

English

Publisher

ieee

Conference_Titel

Bipolar/BiCMOS Circuits and Technology Meeting, 2007. BCTM '07. IEEE

Conference_Location

Boston, MA

ISSN

1088-9299

Print_ISBN

978-1-4244-1019-4

Electronic_ISBN

1088-9299

Type

conf

DOI

10.1109/BIPOL.2007.4351866

Filename

4351866