Noise analysis of NPN SOI bipolar transistors for the design of charge measuring systems

Author

Ratti, Lodovico ; Speziali, Valeria ; Traversi, Gianluca ; Manghisoni, Massimo ; Re, Valerio ; Fallica, Giorgio ; Leonardi, Salvatore

Volume

2

fYear

2003

fDate

19-25 Oct. 2003

Firstpage

1091

Abstract

This paper is concerned with the analysis of the noise properties of NPN junction bipolar transistors fabricated in a monolithic technology. Such devices are part of a BiCMOS silicon on insulator process, whose suitability for radiation hard applications is being evaluated. A thorough noise characterization, including series and parallel contribution measurements, was performed in view of the design of high speed analog frontend electronics for radiation detectors. For this purpose, a method for optimizing the noise performances of charge measuring systems has been applied to the experimental data from single device characterization.

Keywords

BiCMOS integrated circuits; bipolar transistors; semiconductor counters; semiconductor device noise; silicon-on-insulator; BiCMOS; NPN SOI bipolar transistors; charge measuring systems; noise analysis; noise characterization; parallel contribution measurements; series contribution measurements; BiCMOS integrated circuits; Bipolar transistors; Charge measurement; Current measurement; Noise measurement; Optimization methods; Performance evaluation; Radiation detectors; Silicon on insulator technology; Velocity measurement;

fLanguage

English

Publisher

ieee

Conference_Titel

Nuclear Science Symposium Conference Record, 2003 IEEE

ISSN

1082-3654

Print_ISBN

0-7803-8257-9

Type

conf

DOI

10.1109/NSSMIC.2003.1351882

Filename

1351882