DocumentCode
1817234
Title
A BiCMOS 0.8 μm process with a toolkit for mixed-mode design
Author
Stolfa, D. ; Reuss, R. ; Ford, J. ; Cosentino, B. ; Monk, D. ; Shapiro, F. ; Lamey, D. ; Dragon, C.
Author_Institution
Motorola, Inc., Mesa, AZ, USA
fYear
1993
fDate
9-12 May 1993
Abstract
A production 0.8-μm BiCMOS process having optional process modules for mixed-mode IC applications is described. Schottky-clamped NPN, isolated NMOS, vertical PNP, and N-channel JFET transistors are among the devices that can be added to the process at little additional cost. Electrical characteristics of the standard BiCMOS and optional devices are discussed. A toolkit composed of these devices gives designers increased flexibility in creating novel integrated circuits for computer, telecommunication, and radio-frequency applications
Keywords
BiCMOS integrated circuits; 0.8 micron; BiCMOS process; LOCOS; N-channel JFET transistors; Schottky-clamped NPN; isolated NMOS; isolation; mixed-mode IC applications; modular process; optional process modules; toolkit; vertical PNP; Application software; Application specific integrated circuits; BiCMOS integrated circuits; Costs; Electric variables; MOS devices; Production; Radio frequency; Radiofrequency integrated circuits; Telecommunication computing;
fLanguage
English
Publisher
ieee
Conference_Titel
Custom Integrated Circuits Conference, 1993., Proceedings of the IEEE 1993
Conference_Location
San Diego, CA
Print_ISBN
0-7803-0826-3
Type
conf
DOI
10.1109/CICC.1993.590762
Filename
590762
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