DocumentCode :
1818044
Title :
Hardening techniques against transient faults for asynchronous circuits
Author :
Monnet, Y. ; Renaudin, M. ; Leveugle, R.
Author_Institution :
TIMA Lab., Grenoble, France
fYear :
2005
fDate :
6-8 July 2005
Firstpage :
129
Lastpage :
134
Abstract :
This paper presents hardening techniques against transient faults for quasi delay insensitive (QDI) circuits. Because of their specific architecture, asynchronous circuits have a very different behavior than synchronous circuits in the presence of faults. We address the effects of transient faults in QDI circuits and describe consequences on the circuit behavior. Three techniques exploiting QDI circuit properties are proposed for hardening. These techniques improve the tolerance to transient faults, and make their detection easier. These techniques are compared in terms of efficiency and cost.
Keywords :
asynchronous circuits; delay circuits; error detection; fault tolerance; hardening; transients; asynchronous circuits; circuit behavior; hardening techniques; quasi delay insensitive circuits; transient faults; Asynchronous circuits; Circuit faults; Clocks; Costs; Delay systems; Electrical fault detection; Fault detection; Laboratories; Logic circuits; Protocols;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
On-Line Testing Symposium, 2005. IOLTS 2005. 11th IEEE International
Print_ISBN :
0-7695-2406-0
Type :
conf
DOI :
10.1109/IOLTS.2005.30
Filename :
1498146
Link To Document :
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