Title :
Low frequency dithering technique for linearization of voltage mode class-D amplifiers
Author :
Malekzadeh, F.A. ; Mahmoudi, R. ; van Roermund, Arthur
Author_Institution :
Electr. Eng. Dept., Univ. of Waterloo, Waterloo, ON, Canada
Abstract :
This paper introduces a novel technique for simultaneous linearity and efficiency enhancement of class-D amplifiers by combining a low frequency sinusoid, known as dither, with a bandpass signal. The proposed technique improves the linearity due to dither averaging effect, and power efficiency, due to the reduction of reactive loss. The feasibility of the idea is verified through realization and measurement of a 65 nm TSMC CMOS voltage mode class-D amplifier operating at 1 GHz. The drain efficiency is enhanced from 19.2 to 37 percent, while providing ACPR of - 33 dBc for the first adjacent WCDMA channel.
Keywords :
CMOS analogue integrated circuits; UHF amplifiers; code division multiple access; TSMC CMOS voltage mode class-D amplifier; WCDMA channel; bandpass signal; dither averaging effect; efficiency enhancement; frequency 1 GHz; low frequency dithering technique; power efficiency; reactive loss reduction; simultaneous linearity; size 65 nm; voltage mode class-D amplifier linearization; Band-pass filters; CMOS integrated circuits; Frequency measurement; Linearity; Multiaccess communication; Pulse width modulation; Voltage measurement; PAPR; Power amplifiers; class-D; dither; efficiency; linearity; load pull measurements;
Conference_Titel :
Power Amplifiers for Wireless and Radio Applications (PAWR), 2013 IEEE Topical Conference on
Conference_Location :
Santa Clara, CA
Print_ISBN :
978-1-4673-2915-6
Electronic_ISBN :
978-1-4673-2931-6
DOI :
10.1109/PAWR.2013.6490187
