DocumentCode :
1820820
Title :
Instruction buffer with limited control flow and loop nest support
Author :
Guzma, Vladimír ; Pitkänen, Teemu ; Takala, Jarmo
Author_Institution :
Dept. of Comput. Syst., Tampere Univ. of Technol., Tampere, Finland
fYear :
2011
fDate :
18-21 July 2011
Firstpage :
263
Lastpage :
269
Abstract :
In this work, we present a minimalistic, energy efficient implementation of instruction buffer. We use loop detection and execution trace analysis to find most commonly executed loops in already scheduled application and tailor instruction buffer size to the size of most commonly executed loop(s). In addition to our previous work, we allow buffering of loops with limited control flow (early exit from the loop or early return to the beginning of the loop). We also show how analysis of loop nests can decrease the number of times loop body is copied from memory into the buffer. Our results show that in case of favorable loop nest, we can execute all but initial loop iterations from the instruction buffer, keeping instruction memory in the deselect mode.
Keywords :
buffer storage; iterative methods; program control structures; execution trace analysis; initial loop iteration; instruction buffer size; instruction memory; limited control flow; loop detection; loop nest support; Buffer storage; Discrete cosine transforms; Energy consumption; Logic gates; Memory management; Radiation detectors; Registers;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Embedded Computer Systems (SAMOS), 2011 International Conference on
Conference_Location :
Samos
Print_ISBN :
978-1-4577-0802-2
Electronic_ISBN :
978-1-4577-0801-5
Type :
conf
DOI :
10.1109/SAMOS.2011.6045470
Filename :
6045470
Link To Document :
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