• DocumentCode
    1821045
  • Title

    Design and test of the PowerPC 603 microprocessor

  • Author

    Vida-Torku, Kofi E. ; Malley, Charles H. ; Park, Sung ; Reed, Rowland

  • Author_Institution
    IBM Corp., Austin, TX, USA
  • fYear
    1995
  • fDate
    6-9 Mar 1995
  • Firstpage
    378
  • Lastpage
    384
  • Abstract
    The PowerPC 603 microprocessor is a powerful low-cost implementation of the PowerPC architecture specification. The structured design, logic verification and test data generation methodologies of the 603 are presented in this paper. The success of these methodologies has been demonstrated by meeting the 603´s aggressive time-to-market goals
  • Keywords
    circuit CAD; computer testing; design for testability; integrated circuit testing; logic CAD; logic testing; microprocessor chips; CAD; PowerPC 603 microprocessor; PowerPC architecture specification; logic verification; low-cost implementation; structured design; test data generation methodologies; Clocks; Design methodology; Energy management; Frequency; Logic design; Logic testing; Microprocessors; Phase locked loops; Power dissipation; Prefetching;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    European Design and Test Conference, 1995. ED&TC 1995, Proceedings.
  • Conference_Location
    Paris
  • Print_ISBN
    0-8186-7039-8
  • Type

    conf

  • DOI
    10.1109/EDTC.1995.470368
  • Filename
    470368
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1821045