A Forward Phase Detector for GSamples/s Phase-Locked Loops

The PLL implementing with the conventional Phase/ Frequency Detector (C-PFD) with feedback-path approach suffers from a dead-zone problem is generally resulted in slow acquisition time. A reasonably wider concurrent pulse is required to achieve a dead-zone free detection. The wider concurrent pulse implies the slow acquisition time PLL. This study presents a novel forward Phase Detector (fPD). The dead-zone-free fPD is operated in two modes: ON (M = 1) and OFF (M = 0). Both input signals INT and EXT are fed into both fPD and CP. The fPD determines the operation mode, while the CP performs the operation of charge/discharge. Two steady signals EXT and INT are used to replace the concurrent pulse in the feedback-path in the C-PFD. Thus, it is a “pulse-less” forward phase detecting scheme. A high-speed PLL with the proposed fPD/CP combination can be achieved. Due to the low disturbance to the Voltage Controlled Oscillator (VCO) control line, the PLL achieves a phase noise of -131 dBc/Hz at 1 MHz offset when the PLL is operated at 2.3 GHz. The low power fPD/CP also achieves high sensitivity for detecting both frequency and phase.