A 13.1GOPS/mW 16-core processor for software-defined radios in 40nm CMOS

Author

Fang-Li Yuan ; Markovic, Dejan

Author_Institution

Univ. of California, Los Angeles, Los Angeles, CA, USA

fYear

2014

fDate

10-13 June 2014

Firstpage

1

Lastpage

2

Abstract

A 16-core processor for software-defined radios is realized in 40nm CMOS. Featuring domain-specific kernels, flexible control and multi-scale interconnects, the processor achieves a peak energy efficiency of 13.1GOPS/mW (76fJ/OP) at 415mV, 25MHz, and a peak performance of 1.17TOPS at 1V, 500MHz, showing >2.4× higher energy efficiency than state-of-the-art communication chip multiprocessors, and closing the gap with functionally-equivalent ASICs to within 2.6×.

Keywords

CMOS digital integrated circuits; application specific integrated circuits; integrated circuit interconnections; microprocessor chips; software radio; 16-core processor; CMOS; communication chip multiprocessors; domain-specific kernels; flexible control; frequency 25 MHz; frequency 500 MHz; functionally-equivalent ASIC; multiscale interconnects; size 40 nm; software-defined radios; voltage 1 V; voltage 415 mV; Decoding; Energy efficiency; MIMO; Multicore processing; Radio frequency; Registers; Software radio; multi-core processors; software-defined radios;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Circuits Digest of Technical Papers, 2014 Symposium on

Conference_Location

Honolulu, HI

Print_ISBN

978-1-4799-3327-3

Type

conf

DOI

10.1109/VLSIC.2014.6858388

Filename

6858388