• DocumentCode
    1833002
  • Title

    Chip-to-chip half duplex data communication at 135 Mbps over power-supply rails

  • Author

    Hashida, Takushi ; Bando, Yoji ; Nagata, Makoto

  • Author_Institution
    Kobe Univ., Kobe
  • fYear
    2008
  • fDate
    3-5 Nov. 2008
  • Firstpage
    209
  • Lastpage
    212
  • Abstract
    Chip-to-chip serial data communication is superposed on power supply over common Vdd/Vss connections through chip, package, and board traces. A power line transceiver demonstrates half duplex spiking communication at 135 Mbps. On-chip power line LC low pass filter attenuates pseudo-differential communication spikes by more than 30 dB, purifying power supply current for internal circuits. Chip-to-chip power line communication invokes supplementary diagnosis functionality to be embedded in SoCs at the time of power connection, with the reduced cost of pin counts.
  • Keywords
    carrier transmission on power lines; data communication; low-pass filters; system-on-chip; transceivers; SoC; Vdd/Vss connections; bit rate 135 Mbit/s; board traces; chip-to-chip half duplex data communication; half duplex spiking communication; internal circuits; on-chip power line LC low pass filter; power line transceiver; power supply current; power-supply rails; pseudodifferential communication spikes; Circuits; Current supplies; Data communication; Low pass filters; Packaging; Power line communications; Power supplies; Rails; Transceivers; Variable structure systems;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference, 2008. A-SSCC '08. IEEE Asian
  • Conference_Location
    Fukuoka
  • Print_ISBN
    978-1-4244-2604-1
  • Electronic_ISBN
    978-1-4244-2605-8
  • Type

    conf

  • DOI
    10.1109/ASSCC.2008.4708765
  • Filename
    4708765