DocumentCode
1834559
Title
Ultimate low cost analog BIST
Author
Negreiros, Marcelo ; Carro, Luigi ; Susin, Altamiro Amadeu
Author_Institution
Univ. Fed. do Rio Grande do Sul, Porto Alegre, Brazil
fYear
2003
fDate
2-6 June 2003
Firstpage
570
Lastpage
573
Abstract
In this work a BIST method for linear analog circuits with very low cost and the smallest possible analog overhead area is presented. The method is suitable to be implemented in the SoC environment, as it allows the reuse of resources already available in the system, and it is essentially digital. Theoretical background is provided, and experimental results demonstrate the advantages and limits of the proposed approach.
Keywords
analogue circuits; analogue integrated circuits; built-in self test; integrated circuit economics; system-on-chip; DSP-based analog test; SoC environment; analog BIST; linear analog circuit; Analog circuits; Built-in self-test; Circuit noise; Circuit testing; Costs; Data acquisition; Permission; Signal generators; System testing; Working environment noise;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 2003. Proceedings
Print_ISBN
1-58113-688-9
Type
conf
DOI
10.1109/DAC.2003.1219084
Filename
1219084
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