DocumentCode :
1835327
Title :
On test data compression and n-detection test sets
Author :
Pomeranz, Irith ; Reddy, Sudhakar M.
Author_Institution :
Sch. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN, USA
fYear :
2003
fDate :
2-6 June 2003
Firstpage :
748
Lastpage :
751
Abstract :
We consider the relationship between test data compression and the ability to perform comprehensive testing of a circuit under an n-detection test set. The size of an n-detection test set grows approximately linearly with n. Therefore, one may expect a decompresser that can decompress a compressed n-detection test set to be larger than a decompresser required for a compact conventional test set. The results presented in this work demonstrate that it is possible to use a decompresser designed based on a compact one-detection test set in order to apply an n-detection test set. Thus, the design of the decompresser does not have to be changed as n is increased. We describe a procedure that generates an n-detection test set to achieve this result.
Keywords :
data compression; integrated circuit testing; circuit testing; n-detection test set; on-chip decompression; test application time; test data compression; test data volume; Circuit faults; Circuit testing; Cities and towns; Clocks; Fault detection; Fault tolerance; Linear approximation; Performance evaluation; Permission; Test data compression;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 2003. Proceedings
Print_ISBN :
1-58113-688-9
Type :
conf
DOI :
10.1109/DAC.2003.1219119
Filename :
1219119
Link To Document :
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