Improvement and synthesis techniques for low-noise Current Steering Logic (CSL)

Author

Xu, Guoqing ; Miao, Guoqing ; Tang, Pushan

Author_Institution

Dept. of Electron. Eng., Fudan Univ., Shanghai, China

fYear

1995

fDate

24-28 Oct 1995

Firstpage

634

Lastpage

636

Abstract

The structure of CMOS Current Steering Logic (CSL) has been improved in this paper. Logic function of CSL has been expanded so that a complete logic family of CSL has been attained. For the sake of lower power and higher speed, several methods for synthesis and minimization of combinational circuits have been summarized. On the basis of these methods, several combinational circuits have been designed and simulated. The results show that improved CSL circuits have better characteristics

Keywords

CMOS logic circuits; circuit optimisation; combinational circuits; integrated circuit noise; logic design; minimisation of switching nets; CMOS current steering logic; combinational circuits; design; logic functions; low-noise circuits; minimization; simulation; synthesis; CMOS logic circuits; Circuit noise; Current supplies; Diodes; Flip-flops; Logic circuits; Logic devices; Logic functions; MOS devices; SPICE;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State and Integrated Circuit Technology, 1995 4th International Conference on

Conference_Location

Beijing

Print_ISBN

0-7803-3062-5

Type

conf

DOI

10.1109/ICSICT.1995.503375

Filename

503375

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1836040