Title :
Chip scale packaging for memory devices
Author :
Akiyama, Yoko ; Nishimura, Akira
Author_Institution :
Semicond. & Integrated Circuits Div., Hitachi Ltd., Tokyo
Abstract :
A low cost, high reliability chip scale package has been developed for memory devices. The developed CSP can be applied to center pad type devices such as DRAM and to peripheral pad type devices such as SRAM and Flash. Reliability and high volume productivity are the main technological challenges that have to be overcome for chip scale packaging. This paper unveils Hitachi´s original CSP concept and shows how our CSP overcomes these challenges
Keywords :
DRAM chips; SRAM chips; encapsulation; integrated circuit packaging; integrated circuit reliability; integrated memory circuits; DRAM devices; Hitachi; SRAM devices; center pad type devices; chip scale packaging; flash memories; high reliability CSP; high volume productivity; memory devices; peripheral pad type devices; Chip scale packaging; Consumer electronics; Costs; Electronics packaging; Integrated circuit packaging; Lab-on-a-chip; Lead; Random access memory; Soldering; Thermal stresses;
Conference_Titel :
Electronic Components & Technology Conference, 1998. 48th IEEE
Conference_Location :
Seattle, WA
Print_ISBN :
0-7803-4526-6
DOI :
10.1109/ECTC.1998.678737
