Title :
Advanced ATM switching system hardware technology using MCM-D, stacking RAM microprocessor module
Author :
Yamanaka, Naoaki ; Kawamura, Tomoaki ; Kaizu, Katsumi ; Harada, Akio
Author_Institution :
NTT Network Service Syst. Labs., Tokyo, Japan
Abstract :
This paper describes newly developed advanced ATM switching system hardware structures based on MCM-D microprocessor modules. The Si-substrate MCM-D technology which integrates microprocessor, interface control and peripheral control custom VLSIs, high-speed SRAMs, and FPGAs is employed. An MCM-D microprocessor module is realized by combining a Motorola 68030, high-performance ASICs, and high-speed SRAM caches. This is made possible by high density packaging and high-speed 4M-byte with parity cache using 25 ns access to 4-Mbit of SRAM memory. The MCM employs 12 SRAMs, possible with the stacked RAM technique, to reduce the module size by 7/8 compared to conventional surface mounting modules. This microprocessor module technology and MCM technology will advance the development of practical B-ISDN ATM switching systems
Keywords :
B-ISDN; SRAM chips; VLSI; application specific integrated circuits; asynchronous transfer mode; integrated circuit packaging; multichip modules; 25 ns; 4 Mbyte; ASICs; ATM switching system; B-ISDN; FPGAs; MCM-D; Si; high density packaging; high-speed SRAMs; peripheral control custom VLSIs; stacking RAM microprocessor module; Asynchronous transfer mode; B-ISDN; Field programmable gate arrays; Hardware; Microprocessors; Packaging; Random access memory; Read-write memory; Switching systems; Very large scale integration;
Conference_Titel :
Electronic Components & Technology Conference, 1998. 48th IEEE
Conference_Location :
Seattle, WA
Print_ISBN :
0-7803-4526-6
DOI :
10.1109/ECTC.1998.678812