Title :
Comparative analysis of 300 mm FAB architectures impact of equipment sets on wafer cost and dynamic performance
Author :
Bachrach, Robert ; Pool, Mark ; Genovese, K. ; Moran, J.C. ; O´Halloran, Michael D. ; Connolly, Thomas J.
Author_Institution :
Appl. Mater. Inc., Santa Clara, CA, USA
Abstract :
A semiconductor fabricator is a highly complex system that hosts the process tools capable of manufacturing IC product devices based upon their process flows. A typical process flow for a 0.15 μm logic process consists of 300 to 400 steps with 22 to 24 mask steps. A variety of equipment sets and organizational architectures are possible for any process flow. The results of a comparative analysis of two such 300 mm FAB architectures are presented in this report. The impact of equipment sets on fab Sizing, Cost, and Performance are described as a function of operating characteristics
Keywords :
integrated circuit economics; integrated circuit manufacture; 0.15 micron; 300 mm; IC manufacturing; dynamic performance; equipment set; logic process; process flow; semiconductor fab architecture; wafer cost; Copper; Costs; Fault tolerance; Logic devices; Logistics; Manufacturing processes; Metrology; Performance analysis; Production facilities; Semiconductor device modeling;
Conference_Titel :
Semiconductor Manufacturing Symposium, 2001 IEEE International
Conference_Location :
San Jose, CA
Print_ISBN :
0-7803-6731-6
DOI :
10.1109/ISSM.2001.962992
