DocumentCode
1840396
Title
Low resistive and highly reliable Cu dual-damascene interconnect technology using self-formed MnSixOy barrier layer
Author
Usui, T. ; Nasu, H. ; Koike, J. ; Wada, M. ; Takahashi, S. ; Shimizu, N. ; Nishikawa, T. ; Yoshimaru, M. ; Shibata, H.
Author_Institution
Semicond. Technol. Acad. Res. Center, Tohoku Univ., Sendai, Japan
fYear
2005
fDate
6-8 June 2005
Firstpage
188
Lastpage
190
Abstract
Copper (Cu) dual-damascene interconnects with self-formed MnSixOy barrier layer using a copper-manganese (Cu-Mn) alloy seed layer is successfully fabricated for the first time. No delamination is found in the chemical mechanical polishing process, probably because of better adhesion strength between the MnSixOy barrier and dielectric. More than 90% yield is obtained for a 1 million via chain. Microstructure analysis by transmission electron microscopy shows that an approximately 2 nm thick and continuous MnSixOy layer is formed at the interface between Cu and dielectric of the via and trench and there is no barrier at the via bottom. This via structure without the bottom barrier provides these essential advantages: reduced via resistance; significant via-electromigration lifetime improvement due to there being no flux divergence site at the via; excellent stress-induced voiding performance.
Keywords
chemical mechanical polishing; copper; copper alloys; electric resistance; electromigration; integrated circuit interconnections; integrated circuit metallisation; integrated circuit reliability; integrated circuit yield; manganese alloys; manganese compounds; silicon compounds; Cu; Cu-Mn; MnSixOy; chemical mechanical polishing process; copper dual-damascene interconnects; copper-manganese alloy seed layer; dielectric; flux divergence site; manganese silicide oxide; manganese silicon oxide; microstructure analysis; reliable interconnect technology; self-formed barrier layer; stress-induced voiding; via resistance; via-electromigration lifetime; yield; Adhesives; Annealing; Chemical processes; Chemical vapor deposition; Copper; Dielectrics; Manganese alloys; Materials science and technology; Slurries; Wiring;
fLanguage
English
Publisher
ieee
Conference_Titel
Interconnect Technology Conference, 2005. Proceedings of the IEEE 2005 International
Print_ISBN
0-7803-8752-X
Type
conf
DOI
10.1109/IITC.2005.1499975
Filename
1499975
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