DocumentCode :
1841382
Title :
Low-power BIBITS encoding with register relabeling for instruction bus
Author :
Cheng, Chin-Tzung ; Chiao, Wei-Hau ; Jean Jyh-Jiun Shann ; Chung, Chung-Ping ; Chen, Wen-Feng
Author_Institution :
Dept. of Comput. Sci. & Inf. Eng., National Chiao Tung Univ., Hsinchu, Taiwan
fYear :
2005
fDate :
27-29 April 2005
Firstpage :
41
Lastpage :
44
Abstract :
Reducing power consumption of embedded system has gained much attention recently. Reducing memory bus switchings is an effective way to reduce system power since memory bus power constitutes a great portion of the system power. While many techniques exist for reducing bus power in address buses, only a few have been proposed for content-bus power reduction. We propose a bus-invert and bus-invert with transition signaling (BIBITS) encoding scheme to reduce power consumption on instruction bus. An instruction is partitioned into fields according to its format. Four elementary Boolean functions are used as encoding functions. BIBITS uses the most suitable encoding functions for different instruction partitions. We also propose a register relabeling algorithm for BIBITS encoding to further reduce bit switchings on register fields. Simulation results show that the overall average switching reduction is 64% of unencoded bus, 59% of the previous register relabeling scheme, and 33% of Petrov´s bus encoding scheme. Compared with Petrov´s bus encoding scheme, our scheme uses a decoding signal table only half the size to encode all basic blocks.
Keywords :
Boolean functions; embedded systems; encoding; low-power electronics; peripheral interfaces; system-on-chip; Boolean functions; address bus; bit switchings; bus encoding; bus power; bus-invert with transition signaling; content-bus power reduction; embedded system; instruction bus; instruction partitions; low-power BIBITS encoding; memory bus switchings; power consumption; register relabeling; switching reduction; Application specific integrated circuits; Capacitance; Embedded system; Encoding; Energy consumption; Hamming distance; Hardware; Power engineering computing; Power system reliability; Registers;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Design, Automation and Test, 2005. (VLSI-TSA-DAT). 2005 IEEE VLSI-TSA International Symposium on
Print_ISBN :
0-7803-9060-1
Type :
conf
DOI :
10.1109/VDAT.2005.1500015
Filename :
1500015
Link To Document :
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