DocumentCode
1844112
Title
VLSI cellular array of coupled delta-sigma modulators for random analog vector generation
Author
Cauwenberghs, Gert
Author_Institution
Dept. of Electr. & Comput. Eng., Johns Hopkins Univ., Baltimore, MD, USA
Volume
2
fYear
1997
fDate
2-5 Nov. 1997
Firstpage
1151
Abstract
Parallel VLSI generation of random analog vectors with controlled statistics from deterministic chaos is the key to applications such as analog encryption and secure communications, analog built-in self-test, stochastic neural networks, and simulated annealing optimization as well as perturbation learning in neural hardware. We present a class of analog additive cellular automata which generate parallel streams of statistically independent, uniformly distributed random analog values. The underlying noise-shaping mechanism is essentially that of a MASH cascade of delta-sigma modulators. We present theory on the noise-shaping properties, scalable parallel VLSI architectures, and include experimental results from an analog VLSI prototype with 65 channels. The cell for each channel implements a switched-capacitor delta-sigma modulator, and measures 100 /spl mu/m/spl times/120 /spl mu/m in 2 /spl mu/m CMOS technology. The 65 cells are connected in a chain on a 2-D grid, and can be rearranged for use in various VLSI applications that require a parallel supply of random analog vectors.
Keywords
CMOS analogue integrated circuits; VLSI; cascade networks; cellular arrays; cellular automata; cellular neural nets; neural chips; parallel architectures; sigma-delta modulation; switched capacitor networks; vectors; 2 micron; 2-D grid; CMOS technology; MASH cascade; VLSI cellular array; analog additive cellular automata; analog built-in self-test; analog encryption; controlled statistics; coupled delta-sigma modulators; deterministic chaos; noise-shaping mechanism; parallel VLSI generation; perturbation learning; random analog vector generation; scalable parallel VLSI architectures; secure communications; simulated annealing optimization; stochastic neural networks; switched-capacitor delta-sigma modulator; uniformly distributed random analog values; Automatic generation control; Built-in self-test; CMOS technology; Chaotic communication; Communication system control; Cryptography; Delta modulation; Noise shaping; Statistics; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Signals, Systems & Computers, 1997. Conference Record of the Thirty-First Asilomar Conference on
Conference_Location
Pacific Grove, CA, USA
ISSN
1058-6393
Print_ISBN
0-8186-8316-3
Type
conf
DOI
10.1109/ACSSC.1997.679085
Filename
679085
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