Novel interconnect infrastructures for massive multicore chips — an overview

With the well-known trend of CMOS scaling as per Moore´s law, traditional on-chip interconnect systems are reaching the point of having a very limited ability to meet the performance needs and specifications of systems-on-chip (SoCs). The conventional two-dimensional (2D) copper-based IC has inherent limitations due to the geometrical constraints of the planar structure. Innovative interconnect paradigms based on optical technologies, RF/wireless, carbon nanotubes, or 3D integration are promising alternatives that may indeed overcome the challenges encountered. In this paper we present an overview of different emerging non-traditional approaches to achieve massive degree of integration in a single chip. The advantages and underlying challenges of each method are highlighted.