DocumentCode
1844602
Title
Improving the scalability of checkpoint recovery for networks-on-chip
Author
Rusu, Claudia ; Grecu, Cristian ; Anghel, Lorena
Author_Institution
TIMA Lab., CNRS-UJF-INPG, Grenoble
fYear
2008
fDate
18-21 May 2008
Firstpage
2793
Lastpage
2796
Abstract
This paper proposes a method of improving the scalability of checkpoint recovery for network-on-chip based systems in terms of checkpointing latency and memory requirements. The improvement considers the broadcasts implied in the checkpointing protocol. It combines the reduction of the number of broadcasts in the checkpoint synchronization protocol with the use of a more efficient broadcast method at network level.
Keywords
network-on-chip; synchronisation; checkpoint recovery; checkpoint synchronization protocol; checkpointing latency; memory requirement; networks-on-chip; Broadcasting; CMOS technology; Checkpointing; Delay; Fault tolerant systems; Laboratories; Network-on-a-chip; Protocols; Scalability; System-on-a-chip;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2008. ISCAS 2008. IEEE International Symposium on
Conference_Location
Seattle, WA
Print_ISBN
978-1-4244-1683-7
Electronic_ISBN
978-1-4244-1684-4
Type
conf
DOI
10.1109/ISCAS.2008.4542037
Filename
4542037
Link To Document