An error-resilient wavelet-based ECG processor under voltage overscaling

This paper presents an error-resilient wavelet-based ECG processor under voltage overscaling (VOS). A novel predictor based on weighted-average bilateral estimation (WBE) is proposed and used for algorithmic noise tolerance (ANT) that compensates the VOS-incurred errors. A two-stage ANT mechanism using heterogeneous error-detection techniques is developed, which enhances the robustness of ANT. This processor is implemented in TSMC 65nm LP CMOS technology. Post-layout simulation results show that our design can tolerate 0.27 pre-correction error rate with 13% voltage reduction while maintaining acceptable beat-detection performance. Compared with the conventional design without ANT, the proposed design can achieve 19% power reduction beyond the point-of-first-failure (PoFF) at the cost of only 5% hardware increment. This design has better trade-off between power saving and hardware cost than the previous works.