Handling special constructs in symbolic simulation

Author

Kolbl, A. ; Kukula, James ; Antreich, Kurt ; Damiano, Robert

Author_Institution

Inst. for Electron. Design Autom., Tech. Univ. of Munich, Germany

fYear

2002

fDate

2002

Firstpage

105

Lastpage

110

Abstract

Symbolic simulation is a formal verification technique which combines the flexibility of conventional simulation with powerful symbolic methods. Some constructs, however, which are easy to handle in conventional simulation need special consideration in symbolic simulation. This paper discusses some special constructs that require unique treatment in symbolic simulation such as the symbolic representation of arrays, an efficient symbolic method for storing arrayed instances and the handling of symbolic data-dependent delays. We present results which demonstrate the effectiveness of our symbolic array model in the simulation of highly regular structures like FPGAs, memories or cellular automata.

Keywords

cellular automata; field programmable gate arrays; formal verification; integrated memory circuits; logic design; logic simulation; symbol manipulation; FPGA; cellular automata; digital circuit design; formal verification; memory circuit; symbolic array model; symbolic delay; symbolic instance array; symbolic simulation; Circuit simulation; Computational modeling; Delay; Digital systems; Electronic design automation and methodology; Field programmable gate arrays; Formal verification; Hardware; Permission; State-space methods;

fLanguage

English

Publisher

ieee

Conference_Titel

Design Automation Conference, 2002. Proceedings. 39th

ISSN

0738-100X

Print_ISBN

1-58113-461-4

Type

conf

DOI

10.1109/DAC.2002.1012603

Filename

1012603