• DocumentCode
    18608
  • Title

    Statistical Functional Yield Estimation and Enhancement of CNFET-Based VLSI Circuits

  • Author

    Ghavami, Behnam ; Raji, Mohsen ; Pedram, Hossein ; Pedram, Massoud

  • Author_Institution
    Comput., Electr., & Inf. Technol. Dept., Amirkabir Univ. of Technol., Tehran, Iran
  • Volume
    21
  • Issue
    5
  • fYear
    2013
  • fDate
    May-13
  • Firstpage
    887
  • Lastpage
    900
  • Abstract
    Carbon nanotube field effect transistors (CNFETs) show great promise as extensions to silicon CMOS. However, imperfections, which are mainly related to carbon nanotubes (CNTs) growth process, result in metallic and nonuniform CNTs leading to significant functional yield reduction. This paper presents a comprehensive technique for statistical functional yield estimation and enhancement of CNFET-based VLSI circuits. Based on experimental data extracted from aligned CNTs, we propose a compact statistical model to estimate the failure probability of a CNFET. Using the proposed failure model, we show that enhancing the CNT synthesis process alone cannot achieve acceptable functional yield for upcoming CNFET-based VLSI circuits. We propose a technique which is based on replacing each transistor by series-parallel transistor structures to reduce the failure probability of CNFETs in the presence of metallic and nonuniform CNTs. The technique is adapted to use single directional independence, which is inherent in aligned CNTs, to enhance the functional yield as validated by theoretical analysis and simulation results. Tradeoffs between failure probability reduction and design overheads such as area and current drive are explored. As demonstrated by extensive simulation results, the proposed technique achieves 80% functional yield in CNFET technology at the cost of 7.5X area and 34% current drive overheads if the CNT density and the fraction of semiconducting CNTs are improved to 200 CNTs per μm and 99.99%, respectively.
  • Keywords
    CMOS integrated circuits; VLSI; carbon nanotube field effect transistors; failure analysis; probability; semiconductor device models; statistical analysis; CNFET-based VLSI circuit enhancement; CNT growth process; CNT synthesis process; carbon nanotube field effect transistors; carbon nanotube growth process; compact statistical model; design overheads; failure probability model; failure probability reduction; functional yield reduction; metallic CNT; nonuniform CNT; series-parallel transistor structures; silicon CMOS circuit; single directional independence; statistical functional yield estimation; CNTFETs; Integrated circuit modeling; Logic gates; Probability; Redundancy; Very large scale integration; Carbon nanotube field effect transistor (CNFET); failure probability; statistical functional yield;
  • fLanguage
    English
  • Journal_Title
    Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1063-8210
  • Type

    jour

  • DOI
    10.1109/TVLSI.2012.2197765
  • Filename
    6216534