3D frequency-dependent RLC elements extraction by full wave analysis: identification of the return current paths in complex power and ground grids of high speed VLSI circuits

This communication deals with the extraction and simulation of on-chip RLC per unit length (p.u.l.) elements for an efficient analysis of high speed digital circuits. In this context, the current distribution in the whole circuit, power and ground grids included, has to be known to correctly estimate inductance. By using a 3D full-wave finite elements method, we identified the current paths arising in the power and ground grids when an on-chip signal switches on a wire placed in a metal below the grids.