DocumentCode
1862298
Title
Power reduction schemes in next generation Intel® ATOM™ processor based sOc for handheld applications
Author
Islam, Rabiul ; Sabbavarapu, Anil ; Patel, Rajesh
Author_Institution
Intel Corp., Austin, TX, USA
fYear
2010
fDate
16-18 June 2010
Firstpage
173
Lastpage
174
Abstract
Lincroft, the next generation Intel® ATOM™ processor based SoC specifically designed for smartphones, is fabricated in 45 nm Hi-K metal gate CMOS. As part of the extensive low power methodology, the chip is divided into numerous power domains with on die distributed powergates to reduce both active and standby power. Measured data shows upto 50X reduction in standby power. Silicon data shows dramatically low power in sleep and deeper sleep standby power states.
Keywords
CMOS integrated circuits; microprocessor chips; mobile handsets; power aware computing; system-on-chip; Lincroft; SoC; next generation Intel ATOM processor; power reduction schemes; smartphones; Atomic measurements; Image restoration; Logic gates; Metals; Power measurement; Silicon; System-on-a-chip;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Circuits (VLSIC), 2010 IEEE Symposium on
Conference_Location
Honolulu, HI
Print_ISBN
978-1-4244-5454-9
Type
conf
DOI
10.1109/VLSIC.2010.5560308
Filename
5560308
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