Title :
Fast feature based non-destructive fault isolation in 3D IC packages utilizing virtual known good device
Author :
Lee, K.C. ; Alton, J. ; Igarashi, M. ; Barbeau, S.
Author_Institution :
TeraView Ltd., Cambridge, UK
fDate :
June 29 2015-July 2 2015
Abstract :
We combine Electro Optical Terahertz Pulse Reflectometry (EOTPR), with full three dimensional device-under-test (DUT) modeling utilizing virtual known good device to quickly and non-destructively isolate faults in advanced 3D IC packages. Computation power required for modeling can quickly become prohibitive with the design complexities of modern IC packages. In this study we adopt a piecemeal modeling approach that bypasses this exponential requirement. A PFA study verifies the accuracy of our model. This shows that feature-based fault analysis with a distance-to-defect accuracy of less than 10 μm can be readily attained through the combination of these techniques.
Keywords :
fault location; integrated circuit packaging; integrated circuit testing; nondestructive testing; reflectometry; three-dimensional integrated circuits; 3D IC package; 3D device-under-test modeling; electro-optical terahertz pulse refectometry; feature based nondestructive fault isolation; virtual known good device; Circuit faults; Integrated circuit modeling; Reflectometry; Solid modeling; Substrates; Three-dimensional displays;
Conference_Titel :
Physical and Failure Analysis of Integrated Circuits (IPFA), 2015 IEEE 22nd International Symposium on the
Conference_Location :
Hsinchu
DOI :
10.1109/IPFA.2015.7224334
