• DocumentCode
    1867753
  • Title

    Experimental evidence for the generation of bulk traps by negative bias temperature stress and their impact on the integrity of direct-tunneling gate dielectrics

  • Author

    Tsujikawa, S. ; Watanabe, K. ; Tsuchiya, R. ; Ohnishi, K. ; Yugami, J.

  • Author_Institution
    Central Res. Lab., Hitachi Ltd., Tokyo, Japan
  • fYear
    2003
  • fDate
    10-12 June 2003
  • Firstpage
    139
  • Lastpage
    140
  • Abstract
    Negative Bias Temperature Instability (NBTI) of pMOSFETs with direct-tunneling gate dielectrics was studied in detail. By investigating the effects of positive bias stress on pMOSFETs after exposure to NBT stress, the generation of bulk charge traps in the gate dielectrics during NBT stress was clearly demonstrated for the first time. We consider that the bulk trap generation is due to hydrogen atoms released from the interface. Moreover, we investigated the impact of the bulk traps on the SILC and TDDB, and described strong indications that the same mechanism, namely the hydrogen release, is responsible for both NBTI and TDDB of pMOSFETs.
  • Keywords
    MOSFET; interface states; leakage currents; semiconductor device breakdown; stress effects; MOSFET; bulk traps generation; charge traps; direct tunneling gate dielectrics; hydrogen atoms; negative bias temperature instability; positive bias stress effect; stress induced leakage current; time dependent dielectric breakdown; Degradation; Dielectrics; Electron traps; Hydrogen; Laboratories; MOSFETs; Niobium compounds; Temperature; Thermal stresses; Titanium compounds;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Technology, 2003. Digest of Technical Papers. 2003 Symposium on
  • Conference_Location
    Kyoto, Japan
  • Print_ISBN
    4-89114-033-X
  • Type

    conf

  • DOI
    10.1109/VLSIT.2003.1221124
  • Filename
    1221124