Signal-to-Noise-Ratio-constrained jitter optimization for wideband amplifiers

Author

Taghavi, Mohammad Hossein ; Belostotski, Leonid ; Haslett, J.W.

Author_Institution

Univ. of Calgary, Calgary, AB, Canada

fYear

2012

fDate

April 29 2012-May 2 2012

Firstpage

1

Lastpage

4

Abstract

This paper describes Signal-to-Noise Ratio (SNR) and jitter behavior in wideband data communication circuits employing series-peaking techniques. Tradeoffs among SNR, jitter, bandwidth enhancement and group-delay variation are shown as functions of capacitance ratios and inductance values for such circuits. It is shown that SNR and jitter can be simultaneously optimized at the expense of bandwidth. The effectiveness of this approach is demonstrated with a 0.13um CMOS transimpedance amplifier design example.

Keywords

CMOS analogue integrated circuits; jitter; operational amplifiers; wideband amplifiers; CMOS transimpedance amplifier design; bandwidth enhancement; capacitance ratio; group-delay variation; inductance value; jitter behavior; series-peaking technique; signal-to-noise-ratio-constrained jitter optimization; size 0.13 mum; wideband amplifier; wideband data communication circuit; Bandwidth; CMOS integrated circuits; Capacitance; Inductors; Jitter; Optimization; Signal to noise ratio; Series-peaking; eye diagram; jitter; signal-to-noise; transimpedance amplifier;

fLanguage

English

Publisher

ieee

Conference_Titel

Electrical & Computer Engineering (CCECE), 2012 25th IEEE Canadian Conference on

Conference_Location

Montreal, QC

ISSN

0840-7789

Print_ISBN

978-1-4673-1431-2

Electronic_ISBN

0840-7789

Type

conf

DOI

10.1109/CCECE.2012.6334915

Filename

6334915