DocumentCode
1869170
Title
A 0.5-14-GHz 10.6-dB CMOS cascode distributed amplifier
Author
Ren-Chieh Liu ; Chin-Shen Lin ; Kuo-Liang Deng ; Huei Wang
Author_Institution
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
fYear
2003
fDate
12-14 June 2003
Firstpage
139
Lastpage
140
Abstract
A 0.5-14-GHz distributed amplifier (DA) using 0.18-/spl mu/m CMOS technology has been presented. It demonstrates the highest gain bandwidth product reported for a CMOS amplifier using a standard Si-based IC process. This DA chip achieves measured results of 10.6/spl plusmn/0.9 dB gain, NF between 3.4 and 5.4 dB with good return losses better than from 0.5 to 14 GHz. The measured output IP3 and P/sub ldB/ are +20 dBm and +10 dBm, respectively, from 2 to 10 GHz.
Keywords
CMOS analogue integrated circuits; cascade networks; distributed amplifiers; gain measurement; radiofrequency amplifiers; radiofrequency integrated circuits; wideband amplifiers; 0.18 micron; 0.5 to 14 GHz; 10.6 dB; 2 to 10 GHz; 3.4 to 5.4 dB; 9.7 to 10.15 dB; CMOS cascode distributed amplifier; CMOS technology; DA chip; Si-based IC process; highest gain bandwidth product; Bandwidth; CMOS process; CMOS technology; Capacitance; Distributed amplifiers; Frequency; Gain measurement; MOSFETs; Semiconductor device measurement; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Circuits, 2003. Digest of Technical Papers. 2003 Symposium on
Conference_Location
Kyoto, Japan
Print_ISBN
4-89114-034-8
Type
conf
DOI
10.1109/VLSIC.2003.1221183
Filename
1221183
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