DocumentCode :
1871136
Title :
Analyzing the design-for-test techniques in a multiple substrate MCM
Author :
Jorgenson, Joel A. ; Wagner, Russell J.
Author_Institution :
Collins Commercial Avionics Div., Rockwell Int. Corp., Cedar Rapids, IA, USA
fYear :
1994
fDate :
25-28 Apr 1994
Firstpage :
360
Lastpage :
365
Abstract :
This paper discusses the results of several design-for-testability techniques implemented in a multichip module (MCM). MCM test issues discussed include boundary scan, Built-In-Self-Test (BIST), concurrent test sequencing, and module level test. Analyzing the results of the DFT attributes is necessary to determine effectiveness of the overall test strategy, improve upon various techniques, and learn lessons that may be carried into subsequent generations of MCM design. A discussion of the analysis and the lessons learned is presented, as well as a brief discussion on future planned implementations
Keywords :
boundary scan testing; built-in self test; design for testability; integrated circuit testing; multichip modules; BIST; DFT; MCM test issues; boundary scan; built-in-self-test; concurrent test sequencing; design-for-test techniques; module level test; multichip module; multiple substrate MCM; Aerospace electronics; Application specific integrated circuits; Built-in self-test; Circuit testing; Design automation; Design for testability; Multichip modules; Packaging; Read-write memory; Signal processing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Test Symposium, 1994. Proceedings., 12th IEEE
Conference_Location :
Cherry Hill, NJ
Print_ISBN :
0-8186-5440-6
Type :
conf
DOI :
10.1109/VTEST.1994.292288
Filename :
292288
Link To Document :
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