Title :
An automated failure analysis (AFA) methodology for repeated structures
Abstract :
This paper presents a new testing methodology that provides an automated approach to identifying and debugging yield limiting process faults for integrated circuits containing regular arrays. To illustrate the power of this new method, a detailed example of a real life SRAM problem is presented. This example shows the origin of a fault that eludes most industry standard test patterns and suggests how the newly developed AFA methodology recognizes it
Keywords :
SRAM chips; automatic testing; circuit reliability; failure analysis; fault tolerant computing; integrated circuit testing; AFA methodology; automated failure analysis; real life SRAM problem; regular arrays; repeated structures; test patterns; testing methodology; yield limiting process faults; Automatic testing; Circuit faults; Circuit testing; Debugging; Failure analysis; Fault diagnosis; Integrated circuit testing; Integrated circuit yield; Random access memory; Standards development;
Conference_Titel :
VLSI Test Symposium, 1994. Proceedings., 12th IEEE
Conference_Location :
Cherry Hill, NJ
Print_ISBN :
0-8186-5440-6
DOI :
10.1109/VTEST.1994.292294
