• DocumentCode
    187298
  • Title

    Verifying Response Times in Networked Automation Systems Using Jitter Bounds

  • Author

    SRINIVASAN, SUDARSHAN ; Buonopane, Furio ; Ramaswamy, Srini ; Vain, Juri

  • Author_Institution
    S. Seshadhri is with the Eng. Dept., Univ. of Sannio, Benevento, Italy
  • fYear
    2014
  • fDate
    3-6 Nov. 2014
  • Firstpage
    47
  • Lastpage
    50
  • Abstract
    Networked Automation Systems (NAS) have to meet stringent response time during operation. Verifying response time of automation is an important step during design phase before deployment. Timing discrepancies due to hardware, software and communication components of NAS affect the response time. This investigation uses model templates for verifying the response time in NAS. First, jitter bounds model the timing fluctuations of NAS components. These jitter bounds are the inputs to model templates that are formal models of timing fluctuations. The model templates are atomic action patterns composed of three composition operators-sequential, alternative, and parallel and embedded in time wrapper that specifies clock driven activation conditions. Model templates in conjunction with formal model of technical process offer an easier way to verify the response time. The investigation demonstrates the proposed verification method using an industrial steam boiler with typical NAS components in plant floor.
  • Keywords
    jitter; object-oriented programming; program verification; NAS components; alternative composition operators; atomic action patterns; clock driven activation conditions; communication components; design phase; formal models; hardware components; industrial steam boiler; jitter bounds; model templates; networked automation systems; parallel composition operators; response time verification; sequential composition operators; software components; time wrapper; timing discrepancies; timing fluctuations; Automation; Boilers; Delays; Hardware; Jitter; Time factors; Jitter; Networked Automation Systems (NAS); UPPAAL; model checking; timing performance; verification;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Software Reliability Engineering Workshops (ISSREW), 2014 IEEE International Symposium on
  • Conference_Location
    Naples
  • Type

    conf

  • DOI
    10.1109/ISSREW.2014.42
  • Filename
    6983799