DocumentCode
187647
Title
Adaptive grinding and polishing of packaged integrated circuits
Author
Chivas, Robert ; Silverman, Scott
Author_Institution
Varioscale, Inc., San Marcos, CA, USA
fYear
2014
fDate
1-5 June 2014
Abstract
Preparation of packaged integrated circuits for physical and electrical failure analysis often involves precise grinding and polishing of the thick silicon substrate from the backside. In this work we present an adaptive grinding and polishing technique that incorporates in-situ measurement of thickness and flatness into a five axis CNC machine. Uniformity of remaining silicon thickness is maintained when grinding even as the shape of the die changes during thinning. In turn, polishing time is greatly reduced by precisely following the curved die surface.
Keywords
grinding machines; integrated circuit packaging; polishing; adaptive grinding; curved die surface; electrical failure analysis; five axis CNC machine; flatness measurement; packaged integrated circuits; physical analysis; polishing technique; thick silicon substrate; thickness measurement; Computer numerical control; Rough surfaces; Shape; Silicon; Surface roughness; Surface treatment; Thickness measurement; circuit edit; failure analysis; grinding; optical probing; polishing; preparation; silicon;
fLanguage
English
Publisher
ieee
Conference_Titel
Reliability Physics Symposium, 2014 IEEE International
Conference_Location
Waikoloa, HI
Type
conf
DOI
10.1109/IRPS.2014.6861143
Filename
6861143
Link To Document