Title :
VLSI device parameters extraction for radiation hardness modeling with SPICE
Author :
Petrosjanc, K.O. ; Kharitonov, I.A.
Author_Institution :
Moscow Inst. of Electron. Machine Bldg., Russia
Abstract :
For purposes of radiation hardness modeling with SPICE (simulation program with IC emphasis), the procedures for bipolar and MOS transistor model parameter definition are described. The procedures are derived for standard and modified SPICE models. Examples of parameter extraction for irradiated devices are given
Keywords :
SPICE; VLSI; bipolar transistors; circuit CAD; insulated gate field effect transistors; network parameters; radiation hardening (electronics); semiconductor device models; MOS transistor; SPICE; VLSI device parameters extraction; bipolar transistors; irradiated devices; model parameter definition; radiation hardness modeling; simulation program; Data mining; Degradation; Integrated circuit modeling; MOSFETs; Parameter extraction; Predictive models; Radiation effects; SPICE; Threshold voltage; Very large scale integration;
Conference_Titel :
Microelectronic Test Structures, 1993. ICMTS 1993. Proceedings of the 1993 International Conference on
Conference_Location :
Sitges
Print_ISBN :
0-7803-0857-3
DOI :
10.1109/ICMTS.1993.292901