Title :
A Fully-Pipelined FPGA Design for Tree-Reweighted Message Passing Algorithm
Author :
Wenlai Zhao ; Haohuan Fu ; Guangwen Yang
Author_Institution :
Dept. of Comput. Sci. & Technol., Tsinghua Univ., Beijing, China
Abstract :
A Markov random field (MRF) is a set of random variables demonstrating a Markov property in the form of an undirected graph. Maximum a posteriori probability (MAP) inference is a class of methods that seek solutions of problems modeled by MRF. MRF has been a very popular and powerful tool in computer vision problems such as stereo matching and image segmentation [1]. Finding the optimal solution of the MRF MAP problem is an NP-hard problem. Inference algorithms often involve a heavy computation load. Therefore, most related works have focused on improving the performance and efficiency of algorithms. Hardware-based acceleration is one of the most practical solutions.
Keywords :
Markov processes; computer vision; field programmable gate arrays; graph theory; image matching; inference mechanisms; logic design; maximum likelihood estimation; message passing; pipeline processing; stereo image processing; tree data structures; CPU; MRF MAP problem; Markov property; Markov random field; TRW-P; TRW-S; computer vision problems; fully pipelined FPGA design; hardware-based acceleration; inference algorithm; maximum a posteriori probability; parallel hardware design; pipelined hardware design; random variables; sequential tree reweighted message passing; single core software implementation; stereo matching application; tree reweighted message passing algorithm; undirected graph; video rate; Energy minimization; FPGA; Markov Random Field; Tree-Reweighted Message Passing;
Conference_Titel :
Field-Programmable Custom Computing Machines (FCCM), 2014 IEEE 22nd Annual International Symposium on
Conference_Location :
Boston, MA
Print_ISBN :
978-1-4799-5110-9
DOI :
10.1109/FCCM.2014.59
